Device physics and design of germanium tunneling field-effect transistor with source and drain engineering for low power and high performance applications

Abstract

The device physics and electrical characteristics of the germanium (Ge) tunneling field-effect transistor (TFET) are investigated for high performance and low power logic applications using two dimensional device simulation. Due to the high band-to-band tunneling rate of Ge as compared to Si, the Ge TFET suffers from excessive off-state leakage current Ioff despite its higher on-state current Ion. It is shown for the first time that the high off-state leakage due to the drain-side tunneling in the Ge TFET can be effectively suppressed by controlling the drain doping concentration. A lower drain doping concentration reduces the electric field and increases the tunneling barrier width in the drain side, giving a significantly reduced off-state leakage. To increase Ion with a steeper subthreshold swing S, source doping concentration is increased to reduce the bandgap and narrow the tunneling width. Device design and physics detailing the impact of drain and source engineering on the performance of Ge TFET are discussed.