Device design and optimization of CNTFETs for high-frequency applications

Abstract

Carbon nanotube (CNT) field-effect transistors (FETs) have recently reached high-frequency (HF) performance similar to that of silicon RF-CMOS at the same gate length despite a tube density and current per tube that are far from the physical limits and suboptimal device architecture. This work reports on an investigation of the optimal device design for practical HF applications in terms of cut-off frequencies, power gain, and linearity. Different fundamental designs in the gate contact arrangement are considered based on a 3D device simulation of both CNTs and contacts. First, unit cells with a single CNT and minimal contact sizes are compared. The resulting simulation data are then extended toward a structure with two gate fingers and realistic contact sizes. Corresponding parasitic capacitances, as well as series and contact resistances, have been included for obtaining realistic characteristics and figures of merit that can be used for comparison with corresponding silicon RF MOSFETs. Finally, a sensitivity analysis of the device architecture with the highest performance is performed in order to find the optimal device design space.