Device characterization of L-type MOS transistors

Abstract

A new form of MOS transistor called L-type MOS transistor is proposed for high punchthrough voltage and scaled-down DRAM cells. Characteristics such as threshold voltage, subthreshold and back-bias effects are analytically derived and suppression of punchthrough is investigated using device simulation. The threshold voltage and substrate-bias sensitivity are larger than those of the planar MOS transistor. As the radius of curvature increases, these become close to those of the planar MOS. If the radius of curvature is above 0.3 μm, the subthreshold swing is only within 10% larger than that of the planar MOS. 2-Dimensional simulation results show that the L-type MOS transistor has a better punchthrough characteristic than the planar MOS transistor with the same substrate doping. The L-type MOS can be used in some specific ICs such as DRAM cells.