Device and circuit performance of Si-based accumulation-mode CGAA CMOS inverter

Abstract

This paper presents a detailed investigation of the static and Mixed−Mode analysis of the accumulation-mode cylindrical gate all around (AM-CGAA) MOSFET. Consequently, the work extends to the design and analysis of the inverter characteristics like noise margin (NM), effect of voltage scaling and transient response, etc. using the proposed device. Accumulation-mode devices are an alternative to conventional MOSFETs that do not require high cost ultrafast annealing technique for fabrication of smaller length devices. Hence, we prefer to demonstrate the short channel effects (SCEs) and DC characteristics of both n- and p-type AM-CGAA devices at different channel lengths. Further the action of inverter has been systematically explored using the complementary device architecture. The switching and transient characteristics of the inverter is analyzed and compared with experimental data reported in literature. Noise margin and delay performances have also been demonstrated which are found to be in good agreement with the information available in the literature for nano-scale devices. Moreover, the proposed device shows better on/off ratio, near to ideal sub-threshold slope (SS), low drain induced barrier lowering (DIBL) value and acceptable CMOS functionalities.