Abstract

In this paper, we investigate a technological route for the monolithic integration of GaN high-electron-mobility transistors (HEMTs) on silicon complementary metal oxide semiconductor (CMOS) circuits. The CMOS-first approach developed in this work relies on the ammonia-source molecular beam epitaxy (ammonia-MBE) technique which operates at noticeably lower temperatures than the metalorganic chemical vapor deposition (MOCVD) technique. The presence of CMOS devices on the wafer is a challenge that has been addressed by reducing the maximum growth temperature of (Al,Ga)N materials from 920 to 830–850 °C without any degradation of the GaN crystal quality nor the HEMT device behavior. In addition, we developed a dielectric stack able to withstand the large stress arising from the growth process and to mitigate the related cracking and delamination issues. Capacitance–voltage measurements have shown that the HEMT epitaxial structures provide a capacitance plateau with a sharp pinch-off behavior, attesting the absence of any significant interface traps nor residual donor contamination due to the presence of a dielectric mask on the silicon substrate. Preliminary results show that thin buffer HEMT devices with normal electrical behaviors can be locally grown at low temperature.

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