Development of low-cost and highly reliable wafer process package

Abstract

A wafer level chip-scale-package (WLCSP) is expected to reduce the manufacturing cost of CSPs, but reliability of a solder joint for a large chip size of about 100 mm/sup 2/ without underfill assembly is still in question. To meet this needs, we have developed a highly reliable and low-cost WLCSP named wafer process package phase 2 (WPP-2). The package includes a built-in stress-relaxation layer for reducing the strain of the solder bumps. To lower the manufacturing cost of the package, the stress-relaxation layer is formed by printing. The Young's modulus and the thickness of the stress relaxation layer were optimized by finite element analysis. The package was assumed to have 10/spl times/10 mm chip and 54 Sn-Ag-Cu solder balls of 400-/spl mu/m diameter placed as a grid array with the minimum pitch of 0.8 mm, and be mounted on a FR-4 motherboard. It was found that a thickness of 75-/spl mu/m and a Young's modulus of 1000 MPa are necessary for assuring no failure up to 1000 cycles under temperature cycling between -55 and 125/spl deg/C. Accordingly, a resin with a Young's modulus of about 1200 MPa at -55/spl deg/C was developed for the stress relaxation layer. High reliability of the simulated WPP-2 structure was confirmed by simplified test samples made of the developed resin. Fully processed WPP-2 samples were fabricated on an 8-inch wafer. The lifetime of the solder joints mounted on the FR-4 motherboard was evaluated by the temperature cycling test. The contact resistance of none of 50 samples increased by more than 20% even after 1400 cycles, and their lifetime to 50% failure was more than 3000 cycles.