Development of High-Quality Gate Oxide on 4H-SiC Using Atomic Layer Deposition

Abstract

A systematic post-deposition annealing study on Silicon Carbide (SiC) metal-oxide-semiconductor capacitors (MOSCAPs) using atomic layer deposition (ALD)-deposited silicon dioxide (SiO2) layers was carried out. Anneals were done in oxidising (N2O), inert (Ar) and reducing (H2:N2) ambients at elevated temperatures from 900°C to 1300°C for 1 hour. Electrical characterisation results show that the forming gas treatment at 1100°C reduces the flatband voltage to 0.23 V from 10 V for as-deposited SiO2 layers. The density of interface traps (DIT) was also reduced by one order of magnitude to 2×1011 cm-2 eV-1 at EC-ET = 0.2 eV. As an indicator of the improvement, characterisation by x-ray photoelectron spectroscopy (XPS) showed that silicon enrichment present in as-deposited layers was largely reduced by the forming gas anneal, improving the stoichiometry. Time-dependent dielectric breakdown (TDDB) results showed that the majority of forming gas annealed samples broke down at breakdown fields of 12.5 MV × cm-1, which is about 2.5 MV × cm-1 higher than for thermally oxidised samples.