Development of front-end readout electronics for high time resolution measurements with UFSD

Abstract

The research of a few tens of pico-seconds accuracy in timing measurements is currently a hot topic not only in the field of high energy physics but also in several applied physics branches. The Ultra Fast Silicon Detector group of the Turin section of the INFN is involved in this challenge, developing extremely fast silicon sensors. This group spent the recent years simulating and designing UFSD devices, which are essentially a particular type of Low Gain Avalanche Diodes optimized for timing application. These innovative devices for particle tracking are furthermore suitable for a very accurate time measure. The novelty improving the time tagging capability is enabled by the inclusion of a controlled low gain in the detector response, therefore increasing the detector output signal amplitude while keeping controlled the noise. A fast detecting system requires a high-performance front-end electronics to be coupled with the sensors. In cutting-edge experiments like the High-Luminosity LHC, both high spatial and time resolutions are strict constraints. Therefore, highly segmented sensors are employed, implying high density of channels and integrated VLSI electronics. Thanks to the experience gained with the development and the characterization of other timing ASICs, the group is currently exploring various design possibilities for low power front-end electronics to be coupled with UFSDs. The design approach is based on the study of different amplifier architectures, with a dedicated study on the delays introduced by parasitic components. Moreover, taking advantage of different scaled and ultra-scaled CMOS technology nodes, it will be possible to compare among various technology features changing with thThe research of a few tens of pico-seconds accuracy in timing measurements is currently a hot topic not only in the field of high energy physics but also in several applied physics branches. The Ultra Fast Silicon Detector group of the Turin section of the INFN is involved in this challenge, developing extremely fast silicon sensors. This group spent the recent years simulating and designing Ultra-Fast Silicon Detectors (UFSDs), pe of Low Gain Avalanche Diodes optimized for timing application. These innovative devices for particle tracking are furthermore suitable for a very accurate time measure. The novelty improving the time tagging capability is enabled by the inclusion of a controlled low gain in the detector response, therefore increasing the detector output signal amplitude while keeping controlled the noise. A fast detecting system requires a high-performance front-end electronics to be coupled with the sensors. In cutting-edge experiments like the High-Luminosity LHC, both high spatial and time resolutions are strict constraints. Therefore, highly segmented sensors are employed, implying high density of channels and integrated VLSI electronics. Thanks to the experience gained with the development and the characterization of other timing ASICs, the group is currently exploring various design possibilities for low power front-end electronics to be coupled with UFSDs. The design approach is based on the study of different amplifier architectures, with a dedicated study on the delays introduced by parasitic components. Moreover, taking advantage of different scaled and ultra-scaled CMOS technology nodes, it will be possible to compare among various technology features changing with the technology scaling. After an extensive phase of study and design simulation, our group is planning to develop a multichannel ASIC in a commercial 110 µm technology. The planned prototype is a 2 mm × 5 mm chip consisting of 24 channels.