Abstract

During the course of this quarter, peak cell performance has been improved from 0.455V to 0.510V, from 11.8 to 20.2 mA/cm/sup 2/ and from 3.3% to 6.5% as regards open circuit voltage, short circuit current density and conversion efficiency, respectively. Information exchanges and critical reviews of process details have been made with the cooperation of the group at the Institute of Energy Conversion, University of Delaware. As a result of these, two areas were identified which lead to higher cell performance. Substrate temperature control and monitoring to higher cell performance. Substrate temperature control and monitoring during deposition were improved by the use of a thermocouple welded to the foil substrate. Fast, thorough rinsing of the CdS films in the interval between the etch for surface texturing and the immersion in cuprous chloride for barrier formation resulted in less reflective surfaces, and simultaneously high short circuit current and open circuit voltage performance.

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