Development of bottom-up Cu electroplating process and overburden reduction for through silicon via (TSV) application

Abstract

Conventional through silicon via (TSV) Cu electroplating produces excessive Cu overburden, which is deposited on wafer surface. Cu overburden can cause wafer warpage and has to be removed by chemical mechanical polishing (CMP) for following process. We developed new approach to reduce Cu overburden by combining TSV Cu electroplating and chemical seed layer etching. Process parameters for 1st TSV Cu electroplating were optimized for partial TSV filling, followed by Cu wet etching to remove excessive Cu overburden and Cu seed layer. Solid-filled Cu TSV with reduced Cu overburden can be achieved by consecutive 2nd TSV Cu electroplating.