Development of a Real-Time Interpolator for NURBS Based on Multi-DSPs System

Abstract

On the analysis of current non-uniform rational B-spline (NURBS) interpolation studies, a configurable NURBS interpolation flows and a structure of two-phase pipeline mode interpolator which based on dual digital signal processor (DSP) is presented. With TMS32F2812 and TMSC6713 DSP chips, a test NURBS interpolator was built. Time delay indexes of the sub-algorithms included the configurable NURBS interpolation flows ware tested and the tasks scheduling strategy for the multi-DSPs interpolator is discussed. Experimental results showed that configurable NURBS interpolation flows are feasible and it can meet varied needs at tradeoff between speed and precision for different applications. The two-phase pipeline mode NURBS interpolator is successful to increase the interpolation speed.