Abstract
A 1.2 /spl mu/m CMOS production process was adapted to produce a 64 K CMOS fusible-link Programmable Read-Only memory (PROM) for space applications. The circuit requirement of less than 50 ns access time combined with the need for 9 volt single pulse programming of the fusible links and radiation tolerance to levels over 300 krad(Si) made close collaboration between design engineering, reliability engineering, and device engineering essential for a successful project. A vertical NPN bipolar transistor was integrated into a standard CMOS process to be used for programming and reading the fuses. The device characteristics were carefully matched to the product speed and programmability requirements. The NPN device was optimized for radiation performance. Successful development required extensive use of process and device modeling, test structure design and measurement, and experimental design methods. >
Published Version
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