Development of a new hybrid silicon thin‐film transistor fabrication process

Abstract

A new hybrid silicon thin‐film transistor (TFT) fabrication process using the DPSS laser crystallization technique was developed in this study to realize low‐temperature poly‐Si (LTPS) and a‐Si:H TFTs on the same substrate as a backplane of the active‐matrix liquid crystal flat‐panel display (AMLCD). LTPS TFTs were integrated into the peripheral area of the active‐matrix LCD panel for the gate driver circuit, and a‐Si:H TFTs were used as a switching device of the pixel electrode in the active area. The technology was developed based on the current a‐Si:H TFT fabrication process in the bottom‐gate, back‐channel etch‐type configuration. The ion‐doping and activation processes, which are required in the conventional LTPS technology, were thus not introduced, and the field effect mobility values of 4∼5 cm2/V·s and 0.5 cm2/V·s for the LTPS and a‐Si:H TFTs, respectively, were obtained. The application of this technology was demonstrated on the 14.1” WXGA+(1440 × 900) AMLCD panel, and a smaller area, lower power consumption, higher reliability, and lower photosensitivity were realized in the gate driver circuit that was fabricated in this process compared with the a‐Si:H TFT gate driver integration circuit