Development of a Comprehensive Model and a Multiloop Controller for $Z$-Source Inverter DG Systems

Abstract

This paper presents the modeling and design of a closed-loop controller for a Z-source inverter. The Z-source inverter is a recently proposed single-stage power converter, and it is capable of operating in both buck and boost modes. Hence, this inverter gives an economical solution for power conversion in distributed generation (DG) applications, particularly by eliminating the need for a two-stage conversion. Moreover, applications such as DG demand quality output waveforms, and additionally, when the system is subjected to input- and load-side disturbances, their effects need to be minimized. This can be achieved with closed-loop controlling. Toward this end, the system is modeled first with large- and small-signal modeling techniques, and relevant transfer functions are derived. The dc-side of the Z-source inverter shows a non-minimum-phase characteristic, and the output voltage of a Z-source impedance network shows a significant overshoot and undershoot, following a step change in the input due to energy resettling. These effects could be transferred to the ac-side, giving rise to the undershoot and overshoot in the ac output as well. Hence, the proposed controllers should be able to minimize such effects. The ac- and dc-sides are considered separately when designing the controllers. An indirect controller is employed in the dc-side, whereas the ac-side controller is designed in the synchronous reference frame. The modulation index, shoot-through time, and saturation levels are appropriately selected so that the dc-side effects are prevented from propagating into the ac-side. The simulation results are obtained using a state-space-averaged inverter model, and an experimental prototype is built in a laboratory to prove the efficacy of the proposed algorithm. Simulation and experimental results show good reference-tracking and disturbance-rejection properties, validating the desired functionality of the proposed controller.