Abstract
It is demonstrated that it is possible to use TFTs (thin-film transistors) to construct CMOS inverters operating at 40 V. In addition, the authors discuss qualitatively and quantitatively the changes which take place in the grain boundary trap density on removal of HCl during gate oxidation and on grain boundary passivation by hydrogenation. Quantitative measurements of I/sub DS/ as a function of V/sub G/ show that the removal of HCl during gate oxidation of polysilicon lowers the grain boundary trap density by about one third. This is a small but still significant improvement in addition to the reductions by factors of 6 to 9 obtained through hydrogenation. The activation energy for source-drain conduction at low values of V/sub G/ was measured to be 0.55 eV and indicates that conduction is controlled by the supply of carriers from mid-gap grain boundary states. The activation energy of dual gated devices is twice that for a single gated structure, since at values of V/sub G/ close to the conduction minimum, both gates equally control conduction. >
Published Version
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