Abstract
This article presents two methods, the block approach indefinite admittance matrix (BA-IAM) and the estimation-by-inspection, to analyse the effects of deterministic noise on single-stage, single-ended amplifiers by extending the indefinite admittance matrix. The proposed methods are used to develop a generalised two-port network analysis for the commonly used amplifier topologies, in the presence of the supply, ground, bulk, and input noise sources. Various illustrative case studies (common-source, common-gate, and push-pull amplifiers) are considered to validate the analytical method of different CMOS technology nodes (180 nm, 110 nm, and 28 nm) and foundries (Lfoundry, UMC, and TSMC). Both the proposed methods are compared with the relevant existing methods in terms of mean percentage error (MPE), and computational complexity. The mathematically derived expressions using two methods show less than 4% MPE when compared with the schematic simulation results, obtained by the SPICE based simulations. Also, the post-layout simulations (PLS) results for all the examples (designed in CMOS 180 nm Lfoundry technology) show excellent matching with schematic simulations. The proposed methods can be further applicable to antennas, complex circuits, digital circuits, etc.
Highlights
I N the modern VLSI systems, the impact of power supply noise (PSN), ground supply noise (GSN) as well as bulk supply noise (BSN) on the system performance has been increased significantly in the last decade [1]
In order to verify the analytical models, the three basic amplifiers are considered as examples
These circuits are designed for various CMOS technologies and foundries with supply voltage ranging from 1 V to 1.8 V
Summary
I N the modern VLSI systems, the impact of power supply noise (PSN), ground supply noise (GSN) as well as bulk supply noise (BSN) on the system performance has been increased significantly in the last decade [1]. Amplitude of supply fluctuations is in the range of a small percentage of a nominal supply voltage. These fluctuations are predictable and deterministic in nature [2]. A typical system consists of a power management unit, an analog and mixed signal (AMS) circuit, and a digital system block. The supply voltages for analog (AVDD) and digital (DVDD) are kept separate to protect the noise interferences. Both the systems are linked mutually using circuit blocks such as an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), a phase-locked loop (PLL), etc. The ADC, DAC and the PLL performance are degraded for designed specifications under the influence of AC ripples, present in the supply voltage
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