Abstract

This paper deals with the design of processor arrays for algorithms which can be represented as systems of uniform recurrence equations. We present an approach to determine allocation functions as part of this design. The objective of our approach is to generate allocation functions minimizing the necessary chip area for a hardware implementation of a processor array. At first, we propose an algorithm leading to a small number of processors. Then, the algorithm is extended to include the chip area necessary to implement the processors in silicon. The arising optimization problems can be solved using integer linear programming.

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