Abstract
Commercial VDMOSFETs transistors were subjected to positive and negative high field stress. A new model of current deep level transient spectroscopy (CDLTS) characterization is adopted in a research of defects induced and activated by electrical stress. This model is based on pulse width scan instead of classical temperature scan. The band gap is scanned by varying the pulse base level. Positive and negative high field stresses were applied for different periods ranging from 30 to 120 min. After each stress period, activation energies and capture cross sections of detected traps were estimated. Different defects were detected and we have distinguished the doping levels and interface states from deep levels located in the forbidden band gap.
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