Detection of test Patterns with Unreachable States through Efficient Inductive-Invariant Identification

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When testing sequential circuits with scan chains, the test patterns are generated on their combinational parts assuming that all value combinations can be used for flipflops. On the other hands, if target circuits have initial values for flipflops, it is well known that the sets of reachable states may be much smaller than the entire state space, and there are lots of value combinations for flipflops which can never be realized in the normal operations starting with the initial states. Therefore, there are possibilities that the values used for the flipflops in the set of test patterns cannot be realized through normal operations, and there may be over testing issues, as some of the detectable faults by the given test patterns are actually non-detectable under the normal operations. In this paper, we first give a quick way to generate super sets of reachable states on the values of the given subset of flipflops based on QBF (Quantified Boolean Formula) formulation. By limiting the numbers of flipflops in the subset to small, such as 6 or so, we can generate an inductive-invariant for the values of the given subset of flipflops in less than a second for any ISCAS89 circuits. The generated invariant corresponds to a superset of reachable states assuming that the initial state is the one where all flipflop values are zero (or some specific values), and the complement of an invariant is a subset of unreachable states. It is shown that close to the half of a typical set of compacted test patterns for stuck-at (single and multiple) faults on ISCAS89 circuits are using the values from the computed unreachable states, i.e., possibly over testing the circuits, if the initial state is the all zero state. Then we generate the sets of test patterns for stuck-at faults (single and multiple) which never use the values inside the subset of unreachable states. The resulting sets of test patterns become several times larger than a compacted test patterns without considering unreachable states.