Abstract
With several divided stages, placement and routing are the most critical and challenging steps in VLSI physical design. To ensure that physical implementation problems can be manageable and converged in a reasonable runtime, placement/routing problems are usually further split into several sub-problems, which may cause conservative margin reservation and mis-correlation. Therefore, it is desirable to design an algorithm that can accurately and efficiently consider placement and routing simultaneously. In this paper, we propose a detailed placement and global routing co-optimization algorithm while considering complex routing constraints to avoid conservative margin reservation and mis-correlation in placement/routing stages. Firstly, we present a rapidly preprocessing technology based on R-tree to improve the initial routing results. After that, a BFS-based approximate optimal addressing algorithm in 3D is designed to find a proper destination for cell movement. We propose an optimal region selection algorithm based on the partial routing solution to jump out of the local optimal solution. Further, a fast partial net rip-up and rerouted algorithm is used in the process of cell movement. Finally, we adopt an efficient refinement technique to reduce the routing length further. Compared with the top 3 winners according to the 2020 ICCAD CAD contest benchmarks, the experimental results show that our algorithm achieves the best routing length reduction for all cases with a shorter runtime. On average, our algorithm can improve 0.7%, 1.5%, and 1.7% for the first, second, and third place, respectively. In addition, we can still obtain the best results after relaxing the maximum cell movement constraint, which further illustrates the effectiveness of our algorithm.
Highlights
Introduction iationsIn recent years, with the rapid development of integrated circuit manufacturing processes, the geometric dimensions of the integrated circuit have been continuously reduced, and the integration level has continued to increase
No overflow gGrid constraint C1: Overflow is not allowed, which means the demand for a gGrid should not exceed its capacity; No open net constraint C2: The router should produce a routing solution with all pins of nets connected, i.e., having no open net; Maximum cell movement constraint C3: In order to maintain information of the given placement results and avoid generating completely altered placement results, the total number of moved cells during the cell movement should be constrained to 30% among all cells;
Based on some routing constraints, we propose a breadth-first search (BFS)-based approximate optimal addressing algorithm in 3D in Algorithm 3
Summary
Detailed placement is a discrete optimization problem which is crucial to the quality of the placement solution. After moving cells to the optimal HPWL regions, the locations can be locally improved by inter-row moves, cell reordering, and compaction These methods are seldom considered routability, and there may still be greater congestion in the subsequent global routing stage. There are two major drawbacks of their proposed algorithm: (1) the runtime of ILP is sensitive to the quality of the initial solution according to their experimental results, so that an inferior initial routing solution and placement can cause much more runtime in their algorithm; and (2) their method has poor scalability due to the high complexity of solving ILP, and the method is time-consuming, even when only 2% cells are moved and the problem is handled region by region. Cell-movement-driven incremental routing moves and routes all candidate positions in parallel and determines the desired routing paths that achieve the minimum routing resources without any routing violation
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