Designing SRCOs by combining SPICE and Verilog-A

Abstract

The design of single-resistance-controlled oscillators (SRCOs) is presented by using current followers (CF) and voltage followers (VF). First, the design of the followers is described by using SPICE and standard CMOS technology of 0.35 µm. Second, a SRCO is simulated in SPICE by using the designed CF and VF. Third, the SRCO is simulated in Verilog-A by using ideal and real behavioural models for the followers. Finally, the good agreement on the simulation results leads us to conclude on the usefulness to combine SPICE and Verilog-A to enhance analogue integrated circuit design.