Abstract

AbstractIn this paper, geometric mean circuits using level shifted (LSFVF) and cascoded flipped voltage follower (CASFVF) have been proposed. In the proposed designs, flipped voltage follower (FVF) configuration used for biasing of MOS translinear loop has been replaced by LSFVF and CASFVF configurations. The proposed circuits based on FVF allow significant reduction in the supply voltage requirements. A comparative study of geometric mean circuit using different FVF structures is presented. LTSpice XVII has been used for simulation of designed circuits using 1.5 V supply voltage and 180 nm CMOS Technology. The simulated results show substantial improvement in output characteristics and significant improvement in percentage error obtained in output current.KeywordsMOS translinear loop (MTL)Flipped voltage followerLevel shifterCascode configurationGeometric mean circuit

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call