Designing and Analysis of a Negative Bias Temperature Instability Sensing Circuit

Abstract

Scale down the size of devices introduce the effect of negative bias temperature instability (NBTI), positive bias temperature instability (PBTI), and hot carrier injection (HCI) in very-large-scale integration (VLSI) chip design and the major concern is to minimize these effects to a nominal value. In the paper, authors focus in minimization of NBTI effect and develop a noble degradation monitoring sensor circuit named SCHIMOS. A comparison is stated between an analytically strong equisensitive LISOCHIN sensor and SCHIMOS in 90nm and 45nm technology node. Paper experimentally reduces the NBTI effect that is controlled by a number of factors including a reduction in PMOS size, duty cycle, and VDD-Vth tuning. However, NBTI effect degrades the speed and increases the threshold voltage of PMOS transistors. Keywords: NBTI, SCHIMOS, LISOCHIN, PMOS size, VDD-Vth tuning. Cite this Article: Deepjyoti Kalita, Partha Pratim Saikia, Debaprasad Das. Designing and Analysis of a Negative Bias Temperature Instability Sensing Circuit. Research & Reviews: A Journal of Embedded System & Applications. 2020; 8(1): 6–11p.