Design-for-Test of Mixed-Signal Integrated Circuits

Abstract

What to test and what does test need for a complex mixed-signal ASIC are the two main issues this tutorial will try to focus. It will account for several factors: Stimuli generation. An efficient test procedure would use a single signal especially a signal that is easily supplied to a selected input or generated on-chip. Sufficient access. It is preferable to have access to several internal nodes that the tester can read either sequentially or in parallel. Such access permits selection of convenient test points. Single test output. The output should contain all the information required to interpret test signals. Having the information digitally encoded would also reduce tester requirements. Simple measurement set. This set must contain sufficient information about the circuit under test's operational status. System-level decomposition. An efficient test procedure will employ a system-level strategy for decomposing the ASIC into meaningful parts. This decomposition permits testing of each part using a common procedure. These issues are worth attention for specific circuit classes, since there is no universal method valid for any kind of analog and/or mixed-signal function. These factors and their application for solving testing problems in general or for specific circuits will be presented and discussed. In particular, during the presentations making part of this tutorial, more attention will be paid to integrated filters (Switched-Capacitor and continuous-time), integrated A/D and D/A converters, and PLLs.