Design Topologies of a CMOS Charge Pump Circuit for Low Power Applications

Labonnah Farzana Rahman,Lubna Alam,Mohammad Marufuzzaman,Mazlin Bin Mokhtar

doi:10.3390/electronics10060676

Labonnah Farzana Rahman, Lubna Alam + Show 2 more

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https://doi.org/10.3390/electronics10060676

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Abstract

Applications such as non-volatile memories (NVM), radio frequency identification (RFID), high voltage generators, switched capacitor circuits, operational amplifiers, voltage regulators, and DC–DC converters employ charge pump (CP) circuits as they can generate a higher output voltage from the very low supply voltage. Besides, continuous power supply reduction, low implementation cost, and high efficiency can be managed using CP circuits in low-power applications in the complementary metal-oxide-semiconductor (CMOS) process. This study aims to figure out the most widely used CP design topologies for embedded systems on the chip (SoC). Design methods have evolved from diode-connected structures to dynamic clock voltage scaling charge pumps have been discussed in this research. Based on the different architecture, operating principles and optimization techniques with their advantages and disadvantages have compared with the final output. Researchers mainly focused on designing the charge pump topologies based on input/output voltage, pumping efficiency, power dissipation, charge transfer capability, design complexity, pumping capacitor, clock frequencies with a minimum load balance, etc. Finally, this review study summarizes with the discussion on the outline of appropriate schemes and recommendations to future researchers in selecting the most suitable CP design methods for low power applications.

Highlights

In radio frequency identification (RFID) systems, a reader, tag and antenna are the main elements to track or identify any product information using radio-waves
Charge pump (CP) circuits are necessary for low power designs to generate the higher output voltage from a small supply voltage (VDD) in a memory chip [7,8,9]
Low power, low ripple, higher efficiency, higher output voltage, and high-performance charge pump (CP) circuits are in high demand to non-volatile memories (NVM), DC– DC converters, RFID systems, PLL-based design, energy harvesting, and many other applications

Summary

Introduction

In radio frequency identification (RFID) systems, a reader, tag and antenna are the main elements to track or identify any product information using radio-waves. RFID is a technology, which requires radio waves to track or identify any tagged object. A tag is typically a small chip subdivided into three main blocks: analog, logic, and memory blocks, where tag memory holds the product information data. As the tag is a tiny chip, so it requires an internal power supply generator, which produces higher voltage than the power supply voltage [2,6,7]. Charge pump (CP) circuits are necessary for low power designs to generate the higher output voltage from a small supply voltage (VDD) in a memory chip [7,8,9]. Sometimes CP circuits are used as voltage doublers to generate the bias voltages in both analog and digital devices [10,11,12]

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