Design, Simulation, and Fabrication of 4H-SiC Power SBDs With SIPOS FP Structure

Abstract

We introduce a field plate (FP) termination structure utilizing semi-insulating polycrystalline silicon (SIPOS) as the dielectrics in 4H-SiC Schottky barrier diodes (SBDs) in order to relieve the electric field enhancement at the junction corners and enhance the breakdown voltage of devices. In SIPOS FP structures, the maximum electric field $(E_{M})$ within the dielectrics can be significantly reduced in reverse blocking states due to the SIPOS with a higher dielectric constant $(k)$ . Simulation and fabrication of 4H-SiC SBDs with the novel and traditional SiO2 FP were carried out. The simulations were performed using the commercial 2-D device simulator DESSIS. Compared with a traditional SiO2 FP structure device, the optimal design of the new type of SIPOS FP structure will lead to an increase of 780 V in the breakdown voltage and a 44.8% $E_{M}$ reduction. From the experimental results, it has been proven that the new type of SIPOS FP structure indeed relieves the maximum electric field in the dielectric layer while simultaneously realizes an enhanced device breakdown voltage as high as 1630 V, which is about 74.5% of the ideal theoretical breakdown voltage.