Abstract
This paper proposes a new optimization methodology for RF-to-DC converters. The proposed methodology optimizes the power conversion efficiency (PCE) at low RF input power. In addition, it improves the sensitivity and extends the dynamic range. An LC-circuit is embedded with any RF-to-DC converter circuit architecture. Since it reduces the matching constraints at different frequency bands and boosts up the low RF input power. The proposed methodology is applied to four different circuit topologies where the performance results are improved significantly compared to the original architectures. All designs are simulated and verified at dual frequency bands (1.9GHz and 2.4 GHz) with fixed load impedance $50K\Omega$ . Finally, a prototype is implemented using two different CMOS technology nodes (130nm and 65nm) to emphasize the technology process effect on the circuit nerformance.
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