Design of Wideband Signal Decimation Based on Polyphase Filtering

Abstract

In the wideband receiving system of radar, it is often necessary to process signals with high sampling rate and wide bandwidth. The sampling rate that the system can process is limited by the design structure of the whole system. Usually, the signal is processed by a polyphase filter bank composed of several low-order filters. The interpolation and decimation of signals are realized at the same time, which further reduces the sampling rate. However, the baseband signal data rate required by the signal processing system may not be obtained by integer decimation of the sampled signal. Therefore, a structure combining parallel polyphase interpolation filtering and parallel polyphase decimation filtering is designed to realize the decimation of L/M multiple of large bandwidth signals without improving the processing clock of the FPGA.