Abstract

Physically Unclonable Functions (PUFs) are a class of circuits, which are used to map a set of challenges to responses relying upon the intrinsic process variations in interconnects and transistors. The PUFs are expected to produce unique and repeatable responses. In an arbiter based PUF, the uniqueness is contingent upon relative path delays. Reliability or repeatability of responses depends on circuit sensitivity to environmental parameters such as temperature. In this paper, we propose an arbiter based PUF circuit built on current starved inverters, whose drain currents are set by local current mirrors. This circuit amplifies process variations that result in greater uniqueness when compared against a simple inverter chain. The final 64-stage PUF implemented in 45nm CMOS technology requires only 256 current-starved inverter gates. In experimental results we demonstrate superior performance of proposed circuit in uniqueness and reliability.

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