Design of Speed Optimized Analog to Digital Converter using VHDL

Abstract

An analog-to-digital converter (abbreviated ADC, A/D or A to D) is a device that converts a continuous quantity to a discrete time digital representation. An ADC may also provide an isolated measurement. The reverse operation is performed by a digital-to-analog converter (DAC). Typically, an ADC is an electronic device that converts an input analog voltage or current to a digital number proportional to the magnitude of the voltage or current. However, some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. In order to increase the flexibility of control for ADC, a new control method for ADC based on FPGA is proposed in this paper. A state transition diagram can be drawn according to the timing diagram of ADC, the design is implemented using Very High-speed Integrated Circuit Hardware Description Language (VHDL). The operations of ADC are simulated using the modelsim tool and ADC design is synthesized using Xilinx tool.