Design of resolution/power controllable Asynchronous Sigma-Delta Modulator

Anita Arvind Deshmukh,Raghvendra B Deshmukh

doi:10.1186/s13634-016-0399-y

Abstract

This paper presents the design of a Programmable Asynchronous Modulator (PAM) with field control of resolution and power. A novel variable hysteresis Schmitt Trigger (ST) is used for external programmability. Asynchronous Sigma-Delta Modulator (ASDM) implementation with external control voltages is proposed to supervise the resolution and power. This architecture with reduced circuit complexity considerably improves the earlier realizations by eliminating multiple current sources as well switched capacitor circuits and results in power saving up to 87 %. Proposed PAM design demonstrates an improved SNDR of 115 dB, DR of 96 dB, and power consumption below 280 μW. It illustrates Effective Number of Bits (ENOB) to 18.81 and Figure of Merit (FoM) to 0.15 fJ/conversion step. Modulator is implemented in Cadence UMC Hspice 0.18 μm CMOS analog technology. Off-chip PAM control for resolution/power performance has potential applications in battery operated ultra low power applications like IoT; where ADC is one of the major power consuming components. It offers the promise for an efficient performance with power saving.

Highlights

With CMOS technology scaling, circuit implementation faces various challenges in integrating analog and mixed signal circuits
The proposed improved design is simple yet effective with a new concept implemented for Asynchronous Sigma-Delta Modulator (ASDM)
The amplitude information concerning the mean input signal values xi in exacting time window is encoded in the width of these windows. (c) Maximum Limit Cycle Frequency (MLCF) We get maximum frequency in the scheme with zero input. We describe it as a maximum limit cycle frequency (MLCF) of the Programmable Asynchronous Modulator (PAM)

Summary

Introduction

With CMOS technology scaling, circuit implementation faces various challenges in integrating analog and mixed signal circuits. To program the ASDM for minimum switching activity, hysteresis modulation with external control is implemented in the proposed design. This approach improves Signal-toNoise Ratio (SNR) and Dynamic Range (DR) with reduced power and area over reported implementations [8, 9]. Context to the reduction of ADC activity and energy consumption, we have already proposed the low-power ASDM implementation with hysteresis control [9] The use of multiple current sources with switches did not provide energy/area efficient implementation in [9] Considering these aspects, further, we proposed an improved ASDM design by implementing the self-timed quantizer for audio signals [13]. The major problem of using multiple current sources with switches is solved in the proposed design by using externally variable control voltages

Background

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Conclusions