Abstract
In this study, a wearable electrocardiogram (ECG) acquisition system with high performance instrumentation amplifier is presented. It adopts a 3-op-amp circuit and utilizes 180nm CMOS technology to achieve large input impedance. Furthermore, a drive-right leg module is used to configure the input’s common-mode range, increasing the common-mode rejection rate. Simulations in standard 180nm CMOS technology show bandwidths ranging from 0.1Hz to 251Hz. The front-end circuit operates on a 0.8V power supply. At the same time, using LTspice to conduct a preliminary test on the performance of the circuit, the total integrated input-referred noise of the circuit is 3.98 µVRMS , and the power consumption is 5.059 µ W . This satisfies the need for an ECG circuit with low power and noise requirements for wearable technology. The preliminary research findings presented in this paper have established a solid theoretical framework for the amplifier used in the measuring of ECG signals.
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