Abstract

Investigations into novel device architectures and interfaces that enhance charge transport and collection are necessary to increase the power conversion efficiency (PCE) of antimony selenide (Sb2Se3) solar cells, which have shown great promise as a low-cost and high-efficiency alternative to conventional silicon-based solar cells. The current work uses device simulations to design p-i-n and n-i-p Sb2Se3-based solar cell structures. The n-i-p configuration is investigated by comparing distinct electron transport layer (ETL) materials to get the best performance. While certain ETL materials may yield higher efficiencies, the J–V curve may exhibit S-shaped behavior if there is a misalignment of the bands at the ETL/absorber interface. To address this issue, a proposed double ETL structure is introduced to achieve proper band alignment and conduction band offset for electron transport. A PCE of 20.15% was achieved utilizing (ZnO/ZnSe) as a double ETL and Spiro-OMeTAD as a hole transport layer (HTL). Further, the p-i-n configuration is designed by proposing a double HTL structure to facilitate hole transport and achieve a proper valence band offset. A double HTL consisting of (CuI/CuSCN) is used in conjunction with ETL-free configuration to achieve a PCE of 21.72%. The simulation study is conducted using the SCAPS-1D device simulator and is validated versus a previously fabricated cell based on the configuration FTO/CdS/Sb2Se3/Spiro-OMeTAD/Au.

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