Abstract

In cryptography, during the process of encryption, we use multiplication modulo architectures (2^n- 1) and (2^n+ 1) are proposed that enable the implementation of very efficient combinational and pipelined circuits for modular arithmetic. This project is an improvisation of existing modulo multiplier architectures for higher speed and regularity. We use the Montgomery multiplier in this project for the RSA algorithm. Hence, the IDEA block cipher is represented as a high-performance modulo multiplier adder. The circuits that arise are compared qualitatively and quantitatively for the RSA algorithm.

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