Design of Low-Voltage Low-Power CMOS Second Generation Current Conveyor by using the Genetic Algorithm

Asmae El Beqal,Izeddine Zorkani,Bachir Benhala

doi:10.1109/iraset52964.2022.9738420

Design of Low-Voltage Low-Power CMOS Second Generation Current Conveyor by using the Genetic Algorithm

Asmae El Beqal, Izeddine Zorkani + Show 1 more

https://doi.org/10.1109/iraset52964.2022.9738420

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Publication Date: Mar 3, 2022

Citations: 1

Affiliation: Sidi Mohamed Ben Abdellah University, Université Moulay Ismail de Meknes

#Generation Current Conveyor #Current Conveyor + Show 8 more

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Abstract

This article mainly aims at reducing the power consumption and optimizing the performances of CMOS positive second-generation Current Conveyor (CCII+) by using a biological-inspired algorithm named Genetic Algorithm (GA). The optimized CCII+ reduces the total power consumption by 25.5%. The optimal configuration of CCII+ is used as a building block of a relaxation oscillator. SPICE simulation results are presented to validate the good reached performances.

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