Abstract

The Advanced Encryption Standard (AES) is the symmetric cryptography standard that can be used to protect the electronic data. The natural and malicious injected faults may cause confidential information leakage and also reduce its reliability. In this study, we have explained a low complexity fault detection schemes for the AES architecture. The proposed work is low-complexity fault detection schemes using composite fields in polynomial basis for the AES encryption and decryption. These schemes are independent of the existing S-box and inverse S-box constructed. Here we have developed a new technique for the fault detection of subbyte and inverse subbyte using multiplicative inversion and affine transformation of the S-box and the inverse S-box. These are constructed in S-box and the inverse S-box. So this scheme can be used for the S-boxes and the inverse S-boxes in composite fields subbyte and inverse subbyte and using ROM. The proposed AES Fault detection scheme is coded in VHDL (Very High Speed Integrated Circuits Hardware Description Language), synthesized and simulated using EDA (Electronic Design Automation) tool-XilinxISEVirtex FPGA (http://www.xilinx.com/.). Finally the results are compared with Conventional ROM based subbyte and inverse subbyte to show the significant improvement in its efficiency in terms of path delay, speed and area.

Highlights

  • The Advanced Encryption Standard (AES) is the symmetric key cryptography standard that can encrypt and decrypt the electronic data

  • The nonlinear ones are the S-boxes in the encryption and the inverse S-boxes in the decryption

  • It occupies much of the total AES encryption or decryption area

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Summary

INTRODUCTION

The Advanced Encryption Standard (AES) is the symmetric key cryptography standard that can encrypt and decrypt the electronic data. In Cohen (2007) Zhang and Parhi (2004, 2006), the fault detection scheme for the multiplicative inversion of a S-box in composite field polynomial basis, the systematic method including predicted parities have been used. Considering the round key input state as the matrix K = [kr, c]3r,c = 0, with entries kr; c, 0≤r, c≤3, the output state of the AddRoundKey transformation, i.e., O, is obtained as:. The Sbox consists of a multiplicative inversion, i.e., s-1r, c € GF(28), followed by an affine transformation consisting (8) FAULT DETECTION SCHEME of the matrix Г and the vector γ to generate the output The systematic fault detection scheme for the as: multiplicative inversion of s-box and inverse s-box: This scheme explains the 8-bit input of the multiplicative inversion is multiplied by the 8-bit output. We present a systematic method for the fault detection scheme for the multiplicative inversion by deriving the matrix-based formulations for the multiplicative inversion in the S-box and inverses-box

Iαin the finite field the irreducible polynomial of
CONCLUSION
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