Design of logical expression for high speed applications

Abstract

In this paper delay is the major focus of the circuit. Circuit is designed to reduce the delay time of the device. Delay depends on the speed of the device delay and speed is inversely proportionate to each other so basically this circuit is designed to reduce the delay of the circuit so the speed of the device is very high. For high speed device application this will play major role. All the simulations are carried out on LT SPICE Software at 90 nm technology for high speed and low delay circuit.