Design of high performance MoS2-based non-volatile memory via ion beam defect engineering

Abstract

Nonvolatile charge trap memory is an important part of the continuous development of information technology. As a 2-dimensional (2D) material with fantastic physical characteristics, molybdenum disulfide (MoS2) has been receiving extensive attention for its potential applications in electronic devices. However, while various attempts have been made to devise its charge-trap gate stack, it’s still impossible to avoid a certain performance degradation. Here, a MoS2-based nonvolatile charge trapping memory device with a charge-trap gate stack formed by implanting N ions into SiO2 is reported. The fabricated N-implanted memory devices with the energy of 6.5 keV and the dose of 1 × 1015 ions cm−2 exhibit a high on/off current ratio up to 107, a large memory window of 9.1 V, and a high program/erase speed of 10/100 µs. Moreover, the memory device shows an excellent cycling endurance of more than 104 cycles. By combining the MoS2 channel with the N-implanted charge-trap gate stack, this research opens up a fascinating field of nonvolatile charge trap memory devices.