Design of Graph Neural Network Accelerator Based on Heterogeneous Architecture

Abstract

Graph Neural Network (GNN) has super strong graph learning and reasoning ability, so it has attracted more and more attention. The GNN combines the characteristics of graph computing and traditional neural networks, and can execute some complex, non-Euclidean space data, forming a mixed calculation mode of irregular and regular. The traditional processor structure design cannot satisfy the simultaneous processing of graph calculation and neural network acceleration. Therefore, this article proposes a dedicated acceleration architecture for GNNs, customizes hardware computing units and on-chip storage methods, optimizes calculations and memory access, and implements them on the Ultra96-V2 board. The experimental results show that the accelerator designed in this article has achieved good acceleration effect.