Design of FPGA-based sliding mode controller for low-voltage high-frequency buck converter

Abstract

This paper presents the digital design of Sliding Mode Controller (SMC) for synchronous buck converter for high switching frequency and low-voltage applications. The buck converter is designed for a switching frequency of 3 MHz. It steps down an input voltage of 3.6V to an output voltage of 0.9V with duty ratio of 25% and maximum load current of 800mA. It utilizes a hybrid digital pulse width modulator (DPWM) consisting of second order sigma-delta modulator (Σ-Δ DPWM) with counter comparator block. Both digital SMC and Σ-Δ DPWM are realized and validated on Field Programmable Gate Arrays (FPGA) using Xilinx system generator tool. Using digital SMC and Σ-Δ DPWM, an Undershoot of 0.27% and Settling Time of 4µs is achieved for load variations of 0.3A to 0.4A. The performance of SM controller is compared with conventional PID controller in terms of dynamic response for load variations. It is shown that SM control provides consistent dynamic performance over a wide range of load variations.