Design of Energy-Efficient RFET-Based Exact and Approximate 4:2 Compressors and Multipliers

Abstract

The ever-increasing demand for low-power and area-efficient circuits for use in battery-powered devices and the CMOS scaling problems have attracted the attention of VLSI designers to beyond-CMOS technologies like Reconfigurable Field-Effect Transistors (RFETs). Improving the efficiency of multipliers is critical as the core component of many applications such as image processing and Machine Learning (ML). This paper proposes a compact and energy-efficient RFET-based architecture for the 4:2 compressor and Dadda multiplier, leveraging transistor-level reconfigurability and multi-input support of the RFET. Moreover, we propose a novel approximate 4:2 compressor based on efficient RFET logic cells to cater to the needs of error-resilient applications. Extensive circuit-level simulations with 14nm germanium nanowire (GeNW) RFET technology show that the proposed RFET-based exact multiplier improves the power consumption and power-delay product (PDP) by 65% and 45%, respectively, compared to the conventional CMOS-based counterpart in 14nm FinFET technology. Besides, we show that utilizing the proposed approximate compressor, the area and PDP of the multiplier reduce by 46% and 42%. The effectiveness of the approximate multiplier is evaluated in the image multiplication, and the average PSNR and SSIM values are 31.39 and 0.87, respectively.