Abstract
The leakage current is prime concern in the modern portable battery operated device. Therefore, various techniques using MOSFET and FinFET devices are presented and their performance is evaluated and compared. To further reduce the leakage current for improved battery backup in portable devices, new devices namely Carbon Nano Tube Field Effect transistors (CNTFETs) can be used for design of different digital circuits. In this paper, subthreshold leakage power of dual chiral CNTFET based domino circuit is investigated and also the results are compared with single chiral CNTFET domino circuits. For better performance, threshold voltage of CNTFET in critical path is varied by changing the diameter or chirality of carbon nanotube. The subthreshold leakage power saving is observed in dual chiral standard and LECTOR based domino circuits for OR2, OR4, OR8 & OR16 for low temperature (25 °C) and high temperature (110 °C) with low and high input ranges. For high temperature & high input ranges, the simulation results show power saving from 89.65—97.86% and from 91.85—99.76% when compared with single chiral standard and LECTOR based domino circuits, respectively.
Highlights
Due to the scaling limit, conventional CMOS (Complementary Metal Oxide Semiconductor) and FinFET (Fin- Field Effect transistors) technology needs to be replaced with highly efficient Carbon Nano Tubes FETs(CNTFETs)
Subthreshold leakage power saving in dual chiral standard and LECTOR based domino circuits for OR2, OR4, OR8 & OR16 for low temperature (25°C) & low input ranges from 90.36- 95.96% and from 91.97-97.3%; for low temperature & high input ranges from 90.66-95.23% and from 92.85-96.39%; for high temperature (110°C) & low input ranges from 89.24- 99.73% and from 27.5-99.83%; for high temperature & high input ranges from 89.65-97.86% and from 91.85-99.76% when compared with single chiral standard and LECTOR based domino circuits respectively
At 25°C when inputs are low dual chiral standard footerless Carbon Nano Tube Field Effect transistors (CNTFETs) domino subthreshold current is minimum for chiral vector integers n = 19 & 13 and achieve subthreshold leakage power reduction upto 95.96%; for dual chiral LECTOR based CNTFET domino subthreshold current is minimum for chiral vector integers n = 19 & 7 with subthreshold leakage power reduction upto 97.3%
Summary
Due to the scaling limit, conventional CMOS (Complementary Metal Oxide Semiconductor) and FinFET (Fin- Field Effect transistors) technology needs to be replaced with highly efficient Carbon Nano Tubes FETs(CNTFETs). The CNTFET based domino logic circuits can show drastic improvement in power consumption due to ballistic transport phenomenon of charge carriers in CNTFET.This section first presents various characteristics of CNTs followed by the discussion on subthreshold leakage on CNTFETs
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