Design of CMOS Class AB Bridged Audio Amplifier: A Tutorial

A Class D audio amplifier with output signals capable of being as high as the amplifier's supply voltage. The audio amplifier contains a comparator, a positive output stage, and a negative output stage. The output signal from the positive output stage and the output signal from the negative output stage have opposite polarities and are connected to the comparator's negative and positive input terminals respectively. The Class D audio amplifier has superior transient response, and in turn, provides good sound quality and low THD. The resulting variable switching frequencies also help to alleviate EMI problems.

A one-chip integrated circuit (IC) of a 10-W class-D audio power amplifier with very high efficiency using CMOS technology is presented. A mixture of a class D output stage and a bridge tied load (BTL) is the main topology of the proposed amplifier. The new 10-W IC audio power amplifier operates at 12 V with the efficiency of more than 90% and the total harmonic distortion (THD) of 0.1%. The amplifier is implemented in a 4-/spl mu/m double-metal, single-poly CMOS technology that provides with relatively high voltage (12 V) MOSFETs.

In recent years, the introduction of audio switching amplifiers in the audio chain has improved the efficiency, size, and weight of several apparatus. The integration between power supply and amplifier systems appears as the next logical step to achieve further reducing in size, cost and energy consumption. The present paper presents one single stage switching power amplifier and power supply for sub-woofer amplification. It corresponds to a symbiotic choice of a three-level modulation switched audio amplifier with differential filter, feed forward control and a valley-fill circuit. It has high efficiency; very low power supply capacitor values, and minimizes the weight, size, complexity and cost of the reproduction system. The realization of a prototype shows the effectiveness of the proposed solution.

A low power, high PSRR, clock-free, current-controlled class-D audio power amplifier is presented. The proposed audio amplifier utilizes integral sliding mode control (ISMC) to ensure robust operation and to minimize the steady-state error. This architecture has two feedback loops: an outer voltage loop that minimizes the voltage error between the input and output audio signals, and an inner current loop that measures the inductor current to track the input signal accurately. The proposed amplifier achieves up to 82 dB of power supply rejection ratio (PSRR), more than 90 dB of signal-to-noise (SNR) ratio over the entire audio band, and total harmonic distortion plus noise (THD+N) as low as 0.02%. A power-supply-induced intermodulation distortion (PS-IMD) of approximately - 90 dBc was measured for an input voltage signal of 2 V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> at 1 kHz and a sinusoidal power-supply ripple of 300 mV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> at 217 Hz superimposed on the DC level. The IC prototype's controller consumes 30% less power than those of recently published works. The audio amplifier operates with a 2.7-V single voltage supply and delivers a maximum output power of 410 mW with 84% peak efficiency (η) into an 8 Ω speaker. It was fabricated using 0.5 μm CMOS standard technology, and occupies a total active area of 1.65 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

This paper proposes a structured methodology for the design of high-performance audio amplifiers without the use of global negative feedback. This type of amplifier is being suggested in order to minimize supposed deleterious effects on audio quality. The proposed methodology uses a minimum number of stages with local negative feedback operating in a high voltage range in order to minimize harmonic distortion without the need to use global feedback. As an example of applying the methodology, a 50W power amplifier is designed and built. In this design example, three stages are used with field effect transistors operating with a symmetrical voltage of }90V in the voltage gain stages and }45V in the output stage. The practical results obtained satisfied the design requirements, such as: Slew Rate above 3.6V/μs (14V/μs), Upper Cutoff Frequency above 40kHz (125kHz), THD+N below 0.5% (0.2%). Also, to ensure that the designed amplifier has a good linearity, the IMD intermodulation distortion was measured. The value of −62.5dB was obtained. In this way, the effectiveness of the proposed method for the design of audio amplifiers without global negative feedback was proven.

The paper proposes a voltage-controlled grounded resistor. The principle of the proposed circuit is nonlinearity term cancellation of a MOS operating in the ohmic region. The circuit consists of a nonsaturation-operated MOS transistor and a voltage adder circuit. Its advantage over other grounded resistors is that this circuit uses a single low voltage power supply. Simulation results are carried out by using PSpice.

With the rapid development of wireless communication technology, out of the pursuit of higher spectrum efficiency and higher power efficiency, the linearization technology of class D power amplifiers has become an important research direction. The purpose of this article is to study the design and implementation of Class D power amplifiers based on waveform predistortion technology. It introduces in detail the causes and theoretical analysis of several non-linear distortions in the class D audio amplifier, and proposes corresponding solutions, and introduces the modulation methods of several popular class D audio amplifiers, as well as each method. At the same time, several main performance indicators and design points of Class D audio amplifiers are explained. The nonlinear distortion in the open-loop and closed-loop class-D audio amplifiers was modeled and analyzed separately, and some parameters that had a greater impact on the system performance were extracted. Although the frequency of the oscillator is less than 500kHz, it is still very close to the design index, which is low for the design. The distortion class D audio amplifier has great reference value.

Class D power amplifiers, one of the most critical devices for application in sound systems, face severe challenges due to the increasing requirement of smartphones, digital television, digital sound, and other terminals. The audio power amplifier has developed from a transistor amplifier to a field-effect tube amplifier, and digital amplifiers have made significant progress in circuit technology, components, and ideological understanding. The stumbling blocks for a successful power amplifier are low power efficiency and a high distortion rate. Therefore, Class D audio amplifiers are becoming necessary for smartphones and terminals due to their power efficiency. However, the switching nature and intrinsic worst linearity of Class D amplifiers compared to linear amplifiers make it hard to dominate the market for high-quality speakers. The breakthrough arrived with the GaN device, which is appropriate for fast-switching and high-power-density power electronics switching elements compared with traditional Si devices, thus, reducing power electronic systems’ weight, power consumption, and cost. GaN devices allow Class D audio amplifiers to have high fidelity and efficiency. This paper analyzes and discusses the topological structure and characteristics and makes a judgment that Class D amplifiers based on GaN amplifiers are the future development direction of audio amplifiers.

This paper proposes a sliding mode controlled half-bridge audio amplifier using a single power supply for mid power audio application. This half bridge configuration, which is compact and efficient, acts as a band-pass filter for full audio frequencies. Sliding mode control technique is used which obviates requirement of an explicit carrier signal and offers high disturbance rejection. A 10/20 W, 20 Hz to 20 kHz amplifier with 8/4 Ω speaker load is developed and tested. Frequency response of the amplifier confirms the band pass behavior of amplifier. For linearity verification, THD plots for amplitude and frequency variations obtained from the experimental prototype are presented.

This paper presents an integrated digital class D audio power amplifier output stage implemented in a 40V, 0.35µm HV-CMOS technology. The integrated output stage consists of a full H-bridge, gate drivers, bootstrap diodes and protection circuits. Its performance was found to be better than previously published output stages implemented in SOI based BCD processes, which are typically more complex and costly. Experimental results show that low distortion is achieved with high efficiency. In open loop configuration, the minimum Total Harmonic Distortion plus Noise (THD+N) was measured to be 0.016%. The output stage has a maximum efficiency of 88% and delivers up to 38W into a 4Ω Bridge-Tied Load (BTL).

8 - Audio-frequency power amplifiers

Class D audio amplifiers are used in the audio devices. Nowadays, they are preferred due to their high power efficiency compared to the other classes such as: class A, B and AB. In this paper, a class D audio amplifier is designed. It uses MOSFETs in switching mode, a closed-loop with second order integrator, pulse width modulator and low pass filter. The system is simulated with Orcad-PSpice software. Simulated results show good values of THD+N, SNR, PSRR and Efficiency.

Class D audio amplifier can extend battery life for its small cubage and high efficiency. In connection with the advantages of Class D audio amplifier, a class D audio amplifier with high efficiency and low distortion is designed in this paper. A negative feedback is established to improve the linearity of the amplifier and power supply ripple rejection ratio. Minimizing the distortion of the system requires high-speed sampling. High-speed comparator is designed to meet this requirement. Moreover, the work requires that the chip has a band-gap reference with low temperature coefficient and high power supply rejection ratio.

A new Class- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">K*</i> audio amplifier with high-power efficiency and high fidelity is integrated in a 0.35-μm CMOS process. It proposes a new topology connected Class-D amplifier with fast-switching charge-dump (FSCD) amplifier in parallel. The integration of the amplifier requires neither analog buffer amplifier nor a complex compensation circuit needed in hybrid audio amplifier (Class-K). The FSCD amplifier composed of comparators and switches works at a high-switching frequency in order to absorb the distortion caused by Class-D amplifier switching. Thus, this assists the audio amplifier to have good linearity under switching operation. With the proposed topology, the audio amplifier has a flat frequency response with - 3-dB bandwidth of 60 KHz and is capable of delivering up to 257 mW into 4.1-Ω load with maximum efficiency of 81%. A typical total harmonic distortion plus noise (THD+ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> ) is less than 0.1% at the power level over 25 mW within the audio frequency range (20 Hz-20 kHz), and the minimum THD+ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> is 0.025% with the audio input frequency of 1 kHz at the output power of 114 mW.

In this proposed work, a high gain and medium power discrete audio amplifier utilizing a class-AB output stage is designed and simulated. The audio amplifier uses discrete active devices such as BJTs and JFETs. It consists of a pre-amplification stage, tone control circuit and class-AB complementary-symmetry output stage. Due to their high input impedance, JFETs are used at the input side of the audio amplifier. The remaining part of the amplifier circuit uses BJTs operated in active region. A miller capacitance is connected to vary the bandwidth of the circuit. Since single stage amplifiers exhibit limited gain, the proposed audio amplifier incorporates multiple stages with miller capacitance. The design was carried out assuming a set of general specifications and simulated using Microwind software. The circuit is powered from a ±10V power supply and the power consumption is found to be 946mW. The measured 3-dB frequencies were found near to the audio frequency range (48Hz to 22.5 KHz). The total harmonic distortion (THD) is measured to be 5.4%, while the responses of input resistance and output resistance versus frequency curves have been simulated.