Abstract

Radio Frequency Identification (RFID) is an important technique for wireless sensor networks and the Internet of Things. Recently, considerable research has been performed in the combination of public key cryptography and RFID. In this paper, an efficient architecture of Elliptic Curve Cryptography (ECC) Processor for RFID tag chip is presented. We adopt a new inversion algorithm which requires fewer registers to store variables than the traditional schemes. A new method for coordinate swapping is proposed, which can reduce the complexity of the controller and shorten the time of iterative calculation effectively. A modified circular shift register architecture is presented in this paper, which is an effective way to reduce the area of register files. Clock gating and asynchronous counter are exploited to reduce the power consumption. The simulation and synthesis results show that the time needed for one elliptic curve scalar point multiplication over GF(2163) is 176.7 K clock cycles and the gate area is 13.8 K with UMC 0.13 μm Complementary Metal Oxide Semiconductor (CMOS) technology. Moreover, the low power and low cost consumption make the Elliptic Curve Cryptography Processor (ECP) a prospective candidate for application in the RFID tag chip.

Highlights

  • Radio frequency identification (RFID) is an auto identification technology

  • With the rapid development of the Internet of Things (IOT) and wireless sensor networks (WSNs), the demand on security-related RFID systems has grown fast [1]. These RFID applications require low-power and low-cost implementations of security mechanisms. Symmetric key cryptography, such as Advanced Encryption Standard (AES), has been suggested that it might not be preferable for RFID systems, since the number of RFID tags can be very large in WSNs and there is a potential risk involved in storing numerous symmetric keys

  • We present an efficient implementation of Elliptic Curve Cryptography Processor (ECP)

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Summary

Introduction

Radio frequency identification (RFID) is an auto identification technology. Nowadays, it is widely used for identification control, chain management, wireless sensor networks (WSNs) and other applications. There are several implementations of scalar point multiplication in the literatures targeting RFID tag chips [10,11,12,13] These implementations are different from coordinate systems (e.g., affine, projective, and mixed), basis (e.g., polynomial basis, normal basis), curves, architectures or algorithms. Most of these implementation efforts are concentrated on reducing the register number of elliptic curve cryptography processor without considering the practical applications, such as the transaction time. The rest of the paper is organized as follows: Section 2 presents the architecture of the RFID tag chip with our proposed ECP, and, the ECC algorithms are analyzed and optimized.

The Architecture of the RFID Tag Chip with ECP
Arithmetic Analysis
Inversion Algorithm
Adder Unit
Squarer Unit
Multiplier Unit
Register Array
ECP Command Controller
Low Power Strategies
Result Analysis
Comparisons
Findings
Conclusions
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