Design of All-Digital Two Phase Ping-Pong Switched Capacitor Voltage Doubler Power Converter

Abstract

This brief presents an all-digital two-phase Ping Pong voltage doubler with reduced reversion loss by introducing additional switches in the loss path. It is implemented using inverter logic circuits with MOM capacitors stacked on top, which is compatible with digital design flow. With varying clock conditions, the proposed circuit reduces voltage ripples down to 239.9 mV with a voltage drop of less than 20.2 mV (measured). The traditional circuit has a voltage ripple of up to 999 mV with a 171.3 mV voltage drop (simulated). The proposed circuit achieves a peak efficiency of 91.68%.