Abstract
The charge pump voltage booster is used in EEPROM and in other devices. This paper proposes a complementary charge pump voltage booster which is an improvement of the ordinary booster. The proposed circuit and the conventional charge pump voltage booster are compared by a simple analysis and an experiment using discrete elements. It is found that the proposed circuit can reduce the charging time for the capacitive load. Also, the output voltage can be increased and the ripple voltage can be decreased for the resistive load. A computer simulation is performed for the multistage voltage booster using MOS diodes. Further, the proposed circuit is found to be better than the conventional circuit in terms of the output voltage and the ripple voltage. When the charge pump capacitance and the gate size of the MOSFET are halved, and the area occupied on the chip is considered, the output voltage is kept the same and the ripple voltage is reduced. © 1999 Scripta Technica, Electron Comm Jpn Pt 2, 82(6): 73–81, 1999
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: Electronics and Communications in Japan (Part II: Electronics)
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
