Design of a TFET-Based Temperature Invariant LDO Voltage Regulator

Abstract

AbstractIn this paper, a 20 nm TFET-based temperature invariant Low Dropout (LDO) voltage regulator is presented. The comparative analysis is done with a 32 nm CMOS-based LDO regulator. The LDO regulator is implemented using an Error amplifier (EA) which is a TFET-based two-stage Op-Amp. The EA has a high open-loop DC gain of 66.8 dB and phase margin (PM) of 60.9\( ^{\circ } \). The Gain Bandwidth Product (GBW) of the EA is 1.44 GHz, 3 dB frequency of 708.12 kHz, and Gain Margin (GM) of 18.7 dB for load capacitance (\(C_{L} \)) of 100 fF and compensation capacitance (\(C_{C} \)) of 25 fF. The temperature variation analysis shows that only 500 \(\upmu \)V of change in the output voltage occurs for \( - \)50 to 100 \( ^{\circ } \)C temperature variation and only 400 \(\upmu \)V of change occurs in the output voltage for \(I_{LOAD} \) variation from 0 to 50 mA. The designed LDO voltage regulator working with a reference voltage of 0.72 V offers a PSRR 39.6 dB for frequency up to 210 kHz. The designed TFET-based LDO voltage regulator consumes 113.86 \(\upmu \)W of power.KeywordsError amplifierLDOTFETLoad regulationLine regulation