Design of A prototype 128 × 128 ROIC array for 2.6 μm-wavelength SWIR image sensor applications

Abstract

This paper presents the development and evaluation of a 128 × 128 Readout Integrated Circuit (ROIC) prototype, engineered for Short-Wave Infrared (SWIR) imaging at a specific target wavelength of 2.6 μm. Employing silicon-level verification, this work undertook an exhaustive analysis of the ROIC's performance, identifying key areas for enhancement to improve SWIR imaging systems. Fabricated with 0.18-μm CMOS technology, the ROIC is tailored for integration with Indium Gallium Arsenide (InGaAs) Focal Plane Arrays (FPAs), facilitating high-resolution imaging. The prototype consumes 42.25 mW of power and achieves a frame rate of 390 frames per second. The fabricated chip show that the random noise level is 72.65 μVrms and Pixel-FPN is 21 LSBrms. This investigation lays a critical groundwork for future SWIR imaging advancements, providing valuable insights and methodologies to boost imaging performance in various applications.