Design of a Novel Optimized MAC Unit using Modified Fault Tolerant Vedic Multiplier

R Deepa,A Shanmugam

doi:10.19026/rjaset.8.1051

Abstract

In this study, the design of optimized Multiplication and Accumulation (MAC) unit with modified Vedic multiplier is presented. To design a MAC unit, efficient multiplier is used to increase speed and to reduce area and power. Conventional MAC is designed using without fault tolerant Vedic multiplier. But it consumes more area and power. And also less delay. So MAC unit is changed to design the efficient Vedic multiplier. Conventional MAC unit with regular Vedic multiplier is not working for some of the inputs condition. To overcome this fault, novel Vedic multiplier is proposed and designed using less half adder and Full Adder. Simulation is carried out using Modelsim 6.3c. Synthesis and Implementation is carried out using Xilinx and FPGA Spartan 3.

Highlights

Proposed Multiplication and Accumulation (MAC) unit using modified vedic multiplier: In this research study, Modified Vedic multiplier is proposed to reduce the total number of half adder and full adder in order to rectify the fault, when the carry is 1
An efficient multiplier called modified Vedic multiplier has been proposed for MAC unit
It is concluded that, modified Vedic multiplier based MAC unit provides an efficient method for reducing the power dissipation, delay and area

Summary

Introduction

As all of us know that the Computation unit is main unit of any technology (Cieplucha, 2013), which performs different arithmetic operations like as addition, subtraction and multiplication etc., in some places it performs logical operations like as AND, OR, INVERT, XOR etc. Which is dominant feature in the digital domain based applications (Deepak and Kailath, 2012). ALU is the execution unit which does perform Arithmetic operations and logical operations. That’s why ALU is called as the heart of Microprocessor, Microcontrollers and CPUs. No technology can exist, without those operations which are performed by ALU (Shams et al, 1998). Every technology uses works upon those operations either fully or partially which are performed by ALU

Methods

Results

Conclusion