Abstract
Micro-electro mechanical system (MEMS) based oscillators are revolutionizing the timing industry as a cost effective solution, enhanced with more features, superior performance and better reliability. The design of a sustaining amplifier was triggered primarily to replenish MEMS resonator’s high motion losses due to the possibility of their ‘system-on-chip’ integrated circuit solution. The design of a sustaining amplifier observing high gain and adequate phase shift for an electrostatic clamp-clamp (C-C) beam MEMS resonator, involves the use of an 180nm CMOS process with an unloaded Q of 1000 in realizing a fixed frequency oscillator. A net 122dBΩ transimpedance gain with adequate phase shift has ensured 17.22MHz resonant frequency oscillation with a layout area consumption of 0.121 mm2 in the integrated chip solution, the sustaining amplifier draws 6.3mW with a respective phase noise of -84dBc/Hz at 1kHz offset is achieved within a noise floor of -103dBC/Hz. In this work, a comparison is drawn among similar design studies on the basis of a defined figure of merit (FOM). A low phase noise of 1kHz, high figure of merit and the smaller size of the chip has accredited to the design’s applicability towards in the implementation of a clock generative integrated circuit. In addition to that, this complete silicon based MEMS oscillator in a monolithic solution has offered a cost effective solution for industrial or biomedical electronic applications.
Highlights
Reference frequency sources typically generate a single frequency ranging from 1MHz to 50MHz for the use of a channel rate and multi clock domain phase locked loops (PLL), which synthesizes an output ranging from lower megahertz to over 1GHz
The referred C-C beam Micro-electro mechanical system (MEMS) resonator is verified for its insertion loss and total phase shift estimation
A monolithically implementable Si-CMOS reference oscillator has been reported in this work
Summary
Reference frequency sources typically generate a single frequency ranging from 1MHz to 50MHz for the use of a channel rate and multi clock domain phase locked loops (PLL), which synthesizes an output ranging from lower megahertz to over 1GHz. Reference frequency sources typically generate a single frequency ranging from 1MHz to 50MHz for the use of a channel rate and multi clock domain phase locked loops (PLL), which synthesizes an output ranging from lower megahertz to over 1GHz Present electronic devices, such as personal computers, servers and embedded systems are in need of timing clocks to achieve synchronization of operation. Frequency accuracy is flexed in some data interface protocols, such as HS-USB, S-ATA and 10/11/1000 Ethernet, where higher ppm is in need. Reference oscillator in USB 2000 maintains ±500ppm, serial ATA 2005 needs ±350 and IEEE Std. 1998 needs ±100ppm [1,2,3].
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